Session 1

Accelerator Architectures for Deep Neural Networks: Inference and Training

Professor Keshab K. Parhi

Abstract:
Machine learning and data analytics continue to expand the fourth industrial revolution and affect many aspects of our lives. The talk will explore hardware accelerator architectures for deep neural networks (DNNs). I will present a brief review of history of neural networks. I will talk about our recent work on Perm-DNN based on permuted-diagonal interconnections in deep convolutional neural networks and how structured sparsity can reduce energy consumption associated with memory access in these systems (MICRO-2018). I will then talk about reducing latency and memory access in accelerator architectures for training DNNs by gradient interleaving using systolic arrays (ISCAS-2020). Then I will present our recent work on LayerPipe, an approach for training deep neural networks that leads to simultaneous intra-layer and inter-layer pipelining (ICCAD-2021). This approach can increase processor utilization efficiency and increase speed of training without increasing communication costs.

Bio:
Keshab K. Parhi received the B.Tech. degree from the Indian Institute of Technology (IIT), Kharagpur, in 1982, the M.S.E.E. degree from the University of Pennsylvania, Philadelphia, in 1984, and the Ph.D. degree from the University of California, Berkeley, in 1988. He has been with the University of Minnesota, Minneapolis, since 1988, where he is currently Distinguished McKnight University Professor and Edgar F. Johnson Professor of Electronic Communication in the Department of Electrical and Computer Engineering. He has published over 650 papers, is the inventor of 32 patents, and has authored the textbook VLSI Digital Signal Processing Systems (Wiley, 1999) and coedited the reference book Digital Signal Processing for Multimedia Systems (Marcel Dekker, 1999). His current research addresses VLSI architecture design of machine learning systems, hardware security, data-driven neuroscience and molecular/DNA computing. Dr. Parhi is the recipient of numerous awards including the 2017 Mac Van Valkenburg award and the 2012 Charles A. Desoer Technical Achievement award from the IEEE Circuits and Systems Society, the 2004 F. E. Terman award from the American Society of Engineering Education, the 2003 IEEE Kiyo Tomiyasu Technical Field Award, the 2001 IEEE W. R. G. Baker prize paper award, and a Golden Jubilee medal from the IEEE Circuits and Systems Society in 2000. He served as the Editor-in-Chief of the IEEE Trans. Circuits and Systems, Part-I during 2004 and 2005. He is a Fellow of IEEE, ACM, AAAS and the National Academy of Inventors.

Session 2

Starting Your Career, Standing Out As An Achiever

Mr. J-Wing

Abstract:
The one challenge that students face as they take their first step into the working world is to navigate through the sea of unknowns. Education has equipped us with the very basic foundation of application of theories through continuous learning. However, there is a huge gap of unknowns between what education has prepared us and what is needed to be successful in our career. Thus, the answer to “How do you know what you do not know?” is important. Join me as I discuss the 3 steps that encompasses the technical, mindset and soft skill aspects to bridge the unknowns.

Bio:
J-Wing has graduated with a Master’s Degree in Micro-Electronics from Universiti Teknologi Malaysia. He has over 18 years of experience in ASIC and FPGA development which spans across front-end design, backend structural design, verification, VLSI development methodologies and infrastructure development. In the 18 years, he has also led global development initiatives across the world from various sites in the US all the way to India. He holds 1 US patent and 1 patent pending. He is currently leading the development of PCI Express centric and high speed serial interface solutions in Intel Programmable Solutions Group (PSG) delivering to Data Center and 5G areas.

Session 3

Memristor Applications with Analog Neural Networks

Professor Alex James

Abstract:
Memristors are a broad class of resistive devices that can be used as a non-linear resistor, as a memory or in emulating neuron response. They consume low area of chip, and are compatible with CMOS logic. This makes it an interesting class of devices for a variety of applications. In this talk, an overview of the advances in the use of memristor devices for building neural networks are presented. In particular, the issues and challenges faced when designing analog neural networks for practical applications are discussed. We look at why analog computing is useful for near sensor computing and how it can be effectively used for building low power intelligent applications. The case studies involving imaging applications and tactile sensing is presented for understanding the usefulness.

Bio:
Professor Alex James received the Ph.D. degree from the Queensland Micro and Nanotechnology Centre, Griffith University, Brisbane, QLD, Australia. He works in the broad area of brain-inspired circuits, memristive systems, analog circuits and imaging systems. He is currently a Dean and Professor of AI hardware at Digital University Kerala. He is actively engaged in research commercialization and startups; and is Prof-in-charge of Maker Village that supports over 80+ hardware startups. He is Chief Investigator of the centre for Intelligent IoT Sensors, and India Innovation Centre for Graphene, developing new products to the market. Dr. James was the founding chair for IEEE Kerala Section Circuits and Systems Society. He is a member of IEEE CASS Technical committee on Nonlinear Circuits and Systems, IEEE CTSoc Technical Committee on Quantum in Consumer Technology (QCT) and IEEE CTSoc Technical Committee on Machine learning, Deep learning and AI in CE (MDA). He was an editorial member of Information Fusion, Elsevier, and is an Associate Editor for IEEE ACCESS, IEEE Transactions on Emerging Topics in Computational Intelligence (2017-18) (Guest associate editor), and IEEE Transactions on Circuits and Systems 1 (2018-present). He is a Senior Member of IEEE, Life Member of ACM, Senior Fellow of HEA, Fellow of British Computer Society (FBCS), and Fellow of IET (FIET).

Session 4

Engineering development paradigm shifts due to machine learning on edge devices

Mr. Parag Beeraka

Abstract:
Machine learning and artificial intelligence will become defacto in many systems ranging from small microcontroller based devices to large complex server based systems released over the next few years. With these new trends, it is important to embrace the change needed from an engineering development perspective because developers need to consider adding machine learning components into the development flow. Similar to the need for DevOps for scale, engineers now need to consider MLOps into their development flow. On top of machine learning, connectivity to cloud services is becoming the norm of many edge devices to take advantage of many available cloud services. Engineers need to consider the different services offered by cloud service providers to make the concept of cloud to edge as seamless as possible and achieve scale. This keynote will provide an overview of the key development methodologies that different companies need to consider when building devices with machine learning capabilities and cloud service providers.

Bio:
Parag Beeraka is Director of Segment Marketing at Arm, where he is responsible for running different businesses within the IoT Business unit. In his role he is responsible for P&L of the business along with product management, go-to-market strategy and pricing strategy. Before joining Arm, Parag was responsible for the product management of embedded and removable storage products for Smart Camera, IoT, Automotive and Mobile markets at Western Digital. Prior to Western Digital, Parag also worked at AMD and Intel in various engineering positions. Parag has an MBA from the University Of Chicago Booth School of Business. He also has a Master's degree in Computer Engineering from University Of Kansas. Parag is also an alumni of VNR Vignana Jyothi Institute of Engineering and Technology where he received his Bachelors degree in Electronics and Communication Engineering.

Session 5

Deep Learning Similarities: Techniques, Applications, and Future Directions

Dr. Vishnu Pendyala

Abstract:
Similarity has a close relationship with learning, whether it be human or machine. It was recently proved that all machine learning that uses gradient descent, and that includes deep learning, is essentially a kernel machine, where the kernel function measures the similarity between data points. There are many applications possible that rely on similarity. Machine translation generates sentences in a different language, which are similar to the sentences in the original language. Tanscoders do the same for programming languages. We recently published work that uses deep learning to convert music in one melodic framework to similar music in another melodic framework. Another recent publication that we authored describes a music tutor project that takes as input, an amateur vocal rendition, identifies its melodic framework, also using deep learning, and plays back a similar vocal snippet from a master. The talk will expound on these and similar applications by first introducing the notion of latent feature space in machine and deep learning and the unsupervised, self-supervised, and supervised learning techniques that leverage the latent feature space and the notion of similarity.

Bio:
Dr. Vishnu S. Pendyala is a faculty member of the Department of Applied Data Science at San Jose State University and the chair of IEEE Computer Society, Silicon Valley Chapter. He has over two decades of experience with software industry leaders like Cisco and Synopsys in the Silicon Valley, USA. During his recent 3-year term as an ACM Distinguished speaker and before that as a researcher and industry expert, he gave numerous (50+) invited talks. He holds MBA in Finance and PhD, MS, and BE degrees in Computer Engineering from US and Indian universities. Dr. Pendyala taught a one-week course sponsored by the Ministry of Human Resource Development (MHRD), Government of India, under the GIAN program in 2017 to Computer Science faculty from all over the country and delivered the keynote in a similar program sponsored by AICTE, Government of India in 2022.
Dr. Pendyala’s book, “Veracity of Big Data: Machine Learning and Other Approaches to Verifying Truthfulness” made it to several libraries, including those of MIT, Stanford, CMU, and internationally. His edited book, “Tools and Techniques for Software Development in Large Organizations: Emerging Research and Opportunities” is also well-received and is indexed by many libraries all over the world. Dr. Pendyala served on the Board of Directors, Silicon Valley Engineering Council during 2018-2019. He received the Ramanujan memorial gold medal at State Math Olympiad and has been a successful leader during his undergrad years. He also played an active role in Computer Society of India and was the Program Secretary for its annual national convention. Marquis Who's Who has selected Pendyala’s biography for inclusion in multiple of its publications for multiple years. Vishnu spends his fast-vanishing spare time volunteering and has been a reviewer / judge for competitions like the Grace Hopper Celebration of Women in Computing, state level DECA, science fairs and other STEAM events for the last several years. He has traveled widely, covering ~30 states in the US and 23 countries. He resorts to yoga, spirituality, and listening to music, to unwind and be himself.

Session 6

Choice Computing - A humanism and systemic AI for choosing

Professor Parag Kulkarni

Abstract:
Choosing is the key activity and can change the overall course of our lives. Choosing is transient but very systemic in nature. Machine learning is about building abilities in machines to exhibit human intelligence. If it is so, then it may not be incorrect if one says that machine Learning is evolved from human learning paradigms. Since choosing is the core part of learning it is necessary to consider how we choose while building learning models. Choosing can be impacted by context and patterns. It can help us to build revolutionary ML models and change the paradigm of ML. Choosing has two aspects: one focuses on architecting a choice process to lead users on a certain choice path and study of actual choosing behaviors of individuals. The computing aspects of choosing where AI and Machine Learning have been impacting the paradigm of choosing would prove to be the backbone for modern societies. Further choosing fundamentals can revolutionize subtle aspects of AI and ML giving new pathways for building human centric and choice centric products. That leads to a very interesting area of ‘choice computing’. This talk focuses on choice computing to make machines learn in humanish way.

Bio:
Parag is a marathon runner, Tedx speaker, husband of a bright doctor and above all a dreamer. He loves to write poetry and articulate his creative and innovative thoughts and deliver them through his passionate talks. He is also an entrepreneur, Machine Learning researcher and author of best-selling Innovation strategy, ML and Data science books. An avid reader, Parag holds Bachelors from Walchand College of Engineering Sangli (1990), PhD from IIT Kharagpur (2001), management education from IIM Kolkata and was conferred higher doctorate DSc by UGSM monarch, Switzerland (2010). He is the first higher doctorate in the area of knowledge innovation. Parag’s machine learning ideas resulted in pioneering products and have become commercially successful and produced unprecedented impact. He delivered over one thousand keynote addresses and 200+ tutorials across the globe. Over 1000 institutes and 10,00,000+ professionals benefitted from Parag’s talks, research and systemic consultations. Parag helped underperforming professionals, start-ups and students to transform into happy and passionate warriors. Fellow of the IET, IETE, and senior member IEEE, Parag is recipient of Oriental Foundation Scholarship, distinguished alumnus award WCE - Sangli and was nominated for prestigious Bhatnagar award in 2013 and 2014. He was also awarded IETE-KR Phadke award for innovative entrepreneurship and research in 2019.

Session 7

Smart Grid, Micro Grid, and Smart Meters: Technological Challenges & Opportunities

Dr. Deepak L. Waikar

Abstract:
Automation, computing, communication, instrumentation, and sensor technologies have been widely used in industries, globally. The invasion of smart devices is rapidly transforming the various sectors of economy. The combination of smart devices, communication, analytics, artificial intelligence, and agile software has given rise to innovations such as Smart Grid, Micro Grid, and Smart meters for improving efficiency and availability of electricity in developed as well as developing countries. This is further complemented and supplemented by dynamics of new and renewable energy resources for grid-connected and a standalone system. Therefore, innovations in automation, computing, and communication have to be accelerated for incorporating in Smart Grid, Micro Grid, and Smart Metering technologies in the global arena. The policies, frameworks, and funding mechanisms have to be put in place for promoting sustainable as well as disruptive technology innovations in the energy sector to achieve goals set in global accords. Many researchers, academicians, and industry analysts are of the view that for such changes will require concerted efforts and a progressive mind-set. How to achieve synergy between the Intelligent Communication Technologies & Automation for Smart Grid, Micro Grid, and Smart Metering will be the theme of this keynote address. Potential research projects that can be pursued by students and faculty members in view of advances in technologies and developments in the power and energy sector will be outlined in the presentation. Speaker will also highlight on how youths can be engaged in meaningful value- added skills development programmes.

Bio:
Dr. Deepak L. Waikar, (Managing Partner for EduEnergy Consultants LLP, Singapore) has been involved in education, training, research, and management fields for almost three decades. He has authored/co-authored book chapters, research articles, and policy papers on power, energy, management, and education related topics. He has served on various committees of professional bodies such as Chairman of the IEEE, Power Engineering Chapter, Singapore and Chair of IEEE Education Society Singapore Chapter. He is a recipient of the IEEE Power Engineering Society’s Outstanding Power Engineers' Award 2003 and the SP-Green Buddy Award 2004. Dr. Waikar has been involved in Singapore Certified Energy Manager’s programme for more than a decade. He has delivered invited presentations on power, energy, education, management, and leadership related topics at the international conferences, seminars, and forums in North America, Australia-New Zealand, Europe, and Asia. Dr. Waikar is a Senior Member of IEEE USA and a life member of the Institution of Engineers, India. He completed Ph.D. (the National University of Singapore, M.S. (the University of Saskatchewan, Canada) & PD Cert of University Teaching (the University of Newcastle, Australia). He also obtained PG-DBM (Nagpur University), M.Tech. (IIT-Banaras Hindu University) and B.E. (the Government Engineering College, Aurangabad) in India, respectively. His interests include Sustainable Energy Leadership Development, Re-inventing and Transforming Education, SMART Model for Talent Development and Leadership, Innovative Project Design and Management, and Sustainable Development. https://www.linkedin.com/in/dr-deepak-waikar-640a6521/

Session 8

Design Verification: Challenges and Trends

Dr. Vishnu Vimjam

Abstract:
Semiconductor industry has had significant advancements in the past decade due to the advent of highly complex Mobile SoCs, 5G Wireless Networks, High-speed online gaming, Automotive applications and Peta bytes of memory storage requirements which continue to increase as the world becomes digitally connected. These inturn necessitated breakthroughs in high-speed yet low-power design architectures, while pushing the transistor technology to 3nm and into potentially sub-nano in the future. These advancements in turn have given rise to dedicated AI/ML chipsets, which enable a really low-cost of prediction for software applications. A single modern high-end chip has 10s of billions of transistors, which was seemingly difficult to manufacture just a few years back.
As the size and complexity of digital designs continue to increase, Design Verification plays a critical role in ensuring the manufactured silicon does not end up having hardware defects, which then become very expensive to find and fix. A single silicon re-spin costs north of $10M and every possible attempt should be taken to find design bugs prior to a chip tape-out. In this talk, we will review various types of design bugs and why design houses need to employ a shift-left methodology to eradicate design issues at the earliest RTL stages. We will also review how Design Verification tools have advanced significantly in the past decade, which enable a low-cost static signoff, thereby becoming the defacto standard.

Bio:
Dr. Vishnu Vimjam has more than 15 years of experience in developing state-of-the-art EDA verification and sign-off tools as an architect and a technologist. Currently working as the Chief Product Officer at Real Intent Inc, Dr. Vimjam applies his deep technical knowledge and expert understanding of customers’ challenging verification needs to drive product development for Real Intent’s world-class solutions for accelerating RTL sign-off, working with R&D and product management to design, build and test new products. Prior to Real Intent, he held consecutive summer internships at Intel Corporation. He holds a B.Tech degree from Jawaharlal Nehru Technological University, and M.S. and Ph.D. degrees in computer engineering from Virginia Polytechnic Institute and State University. His research interests include SAT/BDD-based Bounded Model Checking and Automatic Test Pattern Generation algorithms. He holds 2 patents and has published several conference papers and online technical articles. Outside of work, he loves to travel and is an avid hiker.

Session 9

Machine Learning in Ads

Dr. Praveen Kolli

Abstract:
We will present an overview of the Ads systems in social media companies. We will address some of the challenges that arise due to petabyte scale data and how machine learning is used to tackle these challenges.

Bio:
Praveen Kolli is a Senior Machine Learning Engineer working in the Ads Ranking Team at Pinterest Inc. At his current position, he builds deep learning models for predicting engagement rates between (user, ad) pairs. Before that, he worked at a startup called Houzz Inc, where he built bidding algorithms for 10M+ products that Houzz advertises on exchanges such as Google and Microsoft Bing. Prior to that, he obtained his PhD in Mathematics from Carnegie Mellon University, Masters in Mathematics of Finance from Columbia University and Bachelors in Electrical Engineering from Indian Institute of Technology, Kharagpur.